{"id":1628,"date":"2020-02-29T13:15:08","date_gmt":"2020-02-29T11:15:08","guid":{"rendered":"https:\/\/epe.utcluj.ro\/?page_id=1628"},"modified":"2021-05-12T21:24:32","modified_gmt":"2021-05-12T19:24:32","slug":"sisteme-cu-dsp-si-fpga","status":"publish","type":"page","link":"https:\/\/epe.utcluj.ro\/index.php\/sisteme-cu-dsp-si-fpga\/","title":{"rendered":"Sisteme cu DSP \u0219i FPGA"},"content":{"rendered":"<div id=\"pl-gb1628-69f4a7b880d06\"  class=\"panel-layout\" ><div id=\"pg-gb1628-69f4a7b880d06-0\"  class=\"panel-grid panel-has-style\" ><div class=\"wide-grey panel-row-style panel-row-style-for-gb1628-69f4a7b880d06-0\" ><div id=\"pgc-gb1628-69f4a7b880d06-0-0\"  class=\"panel-grid-cell\" ><div id=\"panel-gb1628-69f4a7b880d06-0-0-0\" class=\"so-panel widget widget_headline-widget panel-first-child panel-last-child\" data-index=\"0\" >\t\t<h1>Sisteme cu DSP \u0219i FPGA<\/h1>\n\t\t<div class=\"decoration\"><div class=\"decoration-inside\"><\/div><\/div>\n\t\t<h3>Pagina disciplinei con\u021bine aspecte privitoare at\u00e2t la organizarea orelor de curs sau laborator c\u00e2t \u0219i la modul de evaluare al studen\u021bilor \u0219i situa\u021bia actual\u0103 <\/h3>\n\t\t<\/div><\/div><\/div><\/div><div id=\"pg-gb1628-69f4a7b880d06-1\"  class=\"panel-grid panel-no-style\" ><div id=\"pgc-gb1628-69f4a7b880d06-1-0\"  class=\"panel-grid-cell\" ><div id=\"panel-gb1628-69f4a7b880d06-1-0-0\" class=\"so-panel widget widget_circleicon-widget panel-first-child panel-last-child\" data-index=\"1\" >\t\t<div class=\"circle-icon-box circle-icon-position-top circle-icon-hide-box circle-icon-size-large \">\n\t\t\t\t\t\t\t<div class=\"circle-icon-wrapper\">\n\t\t\t\t\t\t\t\t\t\t<div class=\"circle-icon icon-style-set\" style=\"background-color: #000000\">\n\t\t\t\t\t\t\t\t\t\t\t\t\t<div\n\t\t\t\t\t\t\t\tclass=\"fa fa-check  icon-style-set\"\n\t\t\t\t\t\t\t\tstyle=\"color: #81d742\"\t\t\t\t\t\t\t><\/div>\n\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\n\t\t\t\t\t\t\t\t\t\t<h4 >\n\t\t\t\t\tLista de prezen\u021b\u0103\t\t\t\t<\/h4>\n\t\t\t\t\t\t\n\t\t\t\t\t\t\t<p class=\"text\" style=\"color: #000000\">\n\t\t\t\t\u00cen aceast\u0103 categorie vor fi publicate listele de prezen\u021b\u0103 pentru fiecare \u0219edin\u021b\u0103 de laborator\t\t\t<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t<\/div><\/div><div id=\"pgc-gb1628-69f4a7b880d06-1-1\"  class=\"panel-grid-cell\" ><div id=\"panel-gb1628-69f4a7b880d06-1-1-0\" class=\"so-panel widget widget_circleicon-widget panel-first-child\" data-index=\"2\" >\t\t<div class=\"circle-icon-box circle-icon-position-top circle-icon-hide-box circle-icon-size-large \">\n\t\t\t\t\t\t\t<div class=\"circle-icon-wrapper\">\n\t\t\t\t\t\t\t\t\t\t<div class=\"circle-icon icon-style-set\" style=\"background-color: #000000\">\n\t\t\t\t\t\t\t\t\t\t\t\t\t<div\n\t\t\t\t\t\t\t\tclass=\"fa fa-file-archive-o  icon-style-set\"\n\t\t\t\t\t\t\t\tstyle=\"color: #81d742\"\t\t\t\t\t\t\t><\/div>\n\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\n\t\t\t\t\t\t\t\t\t\t<h4 >\n\t\t\t\t\tDocumenta\u021bie \u0219i materiale utile\t\t\t\t<\/h4>\n\t\t\t\t\t\t\n\t\t\t\t\t\t\t<p class=\"text\" >\n\t\t\t\t\u00cen aceast\u0103 categorie vor fi publicate materialele aferente \u0219edin\u021belor de laborator\t\t\t<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t<\/div><div id=\"panel-gb1628-69f4a7b880d06-1-1-1\" class=\"so-panel widget widget_text panel-last-child\" data-index=\"3\" >\t\t\t<div class=\"textwidget\"><p><a href=\"https:\/\/altairuniversity.com\/free-altair-student-edition\/\">Altair (Solid Thinking Embed) student edition<\/a><\/p>\n<p><a href=\"https:\/\/learn.solidthinking.com\/\">Learn Altair \/ Solid Thinking Embed \/ VisSim<\/a><\/p>\n<p><a href=\"https:\/\/www.youtube.com\/channel\/UCKcUcWSbcFPWQysTnoZDygg\/videos\">Altair Embed \/ Solid Thinking \/ VisSim tutorials<\/a><\/p>\n<p><a href=\"http:\/\/www.ti.com\/lit\/ug\/sprui11b\/sprui11b.pdf\">LaunchPad F28069M datasheet<\/a><\/p>\n<p><a href=\"https:\/\/www.youtube.com\/watch?v=62m0lUxBwp8\">Code Composer Studio Tutorial<\/a><\/p>\n<p><a href=\"https:\/\/epe.utcluj.ro\/SCTR\/Indicatii\/Teorema_lui_Nyquist_Shannon.pdf\">Teorema lui Nyquist \u2013 Shannon<\/a><\/p>\n<p>&nbsp;<\/p>\n<\/div>\n\t\t<\/div><\/div><div id=\"pgc-gb1628-69f4a7b880d06-1-2\"  class=\"panel-grid-cell\" ><div id=\"panel-gb1628-69f4a7b880d06-1-2-0\" class=\"so-panel widget widget_circleicon-widget panel-first-child\" data-index=\"4\" >\t\t<div class=\"circle-icon-box circle-icon-position-top circle-icon-hide-box circle-icon-size-large \">\n\t\t\t\t\t\t\t<div class=\"circle-icon-wrapper\">\n\t\t\t\t\t\t\t\t\t\t<div class=\"circle-icon icon-style-set\" style=\"background-color: #000000\">\n\t\t\t\t\t\t\t\t\t\t\t\t\t<div\n\t\t\t\t\t\t\t\tclass=\"fa fa-certificate  icon-style-set\"\n\t\t\t\t\t\t\t\tstyle=\"color: #81d742\"\t\t\t\t\t\t\t><\/div>\n\t\t\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\n\t\t\t\t\t\t\t\t\t\t<h4 >\n\t\t\t\t\tRezultatele evalu\u0103rilor\t\t\t\t<\/h4>\n\t\t\t\t\t\t\n\t\t\t\t\t\t\t<p class=\"text\" >\n\t\t\t\t\u00cen aceast\u0103 categorie vor fi publicate rezultate ale diverselor forme de evaluare at\u00e2t \u00een cadrul \u0219edin\u021belor de curs c\u00e2t \u0219i \u00een cadrul \u0219edin\u021belor de laborator\t\t\t<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t<\/div><div id=\"panel-gb1628-69f4a7b880d06-1-2-1\" class=\"so-panel widget widget_text panel-last-child\" data-index=\"5\" >\t\t\t<div class=\"textwidget\"><\/div>\n\t\t<\/div><\/div><\/div><div id=\"pg-gb1628-69f4a7b880d06-2\"  class=\"panel-grid panel-no-style\" ><div id=\"pgc-gb1628-69f4a7b880d06-2-0\"  class=\"panel-grid-cell\" ><div id=\"panel-gb1628-69f4a7b880d06-2-0-0\" class=\"so-panel widget widget_text panel-first-child panel-last-child\" data-index=\"6\" ><h3 class=\"widget-title\">Lista lucr\u0103rilor de laborator propuse<\/h3>\t\t\t<div class=\"textwidget\"><p>\u00cen cadrul \u0219edin\u021belor de laborator aferente disciplinei \u201eSisteme cu DSP \u0219i FPGA\u201d,<br \/>\nse vor trata urm\u0103toarele teme de studiu:<\/p>\n<p>1. Introducerea \u00een domeniul sistemelor de calcul pe baz\u0103 de DSP:<br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2020\/PDF\/Introducere_DSP.pdf\">Studiul arhitecturilor sistemelor de calcul standard de tip DSP;<\/a><br \/>\n&#8211; <a href=\"http:\/\/epe.utcluj.ro\/DSP_FPGA_2020\/PDF\/Metode_de_programare_f28069m.pdf\">Abordarea metodelor \u0219i solu\u021biilor actuale de progamare (limbaj C++ \u00een mediul Code Composer Studio sau generare automat\u0103 de cod)<\/a>;<\/p>\n<p>2. Abordarea \u0219i solu\u021bionarea problemelor de inginerie pe baza sistemelor de calcul cu DSP:<br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2020\/PDF\/Prezentarea_mediului_Altair_Embed.pdf\">Prezentarea introductiv\u0103 a mediului de simulare, testare \u0219i programare Altair &#8211; SolidThinking Embed (VisSim)<\/a>;<br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2021\/PDF\/Actionarea_unui_motor_fara_perii.pdf\">Ac\u021bionarea unui motor f\u0103r\u0103 perii cu magnet permanent;<\/a><\/p>\n<p>3. Implementarea unei strategii de comand\u0103 \u0219i control pe baz\u0103 de DSP:<br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2021\/PDF\/Comanda_invertorului_trifazat.pdf\">Comanda invertorului trifazat \u00een vederea aliment\u0103rii sarcinilor de curent alternativ<\/a><\/p>\n<p>4. Introducerea \u00een domeniul sistemelor de calcul pe baz\u0103 de FPGA:<br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2020\/PDF\/Studiul_arhitecturilor_FPGA.pdf\">Studiul arhitecturilor sistemelor de calcul reconfigurabile de tip FPGA<\/a>;<br \/>\n&#8211; <a href=\"http:\/\/epe.utcluj.ro\/DSP_FPGA_2020\/PDF\/Metodel_de_progamare_Basys_3.pdf\">Abordarea metodelor \u0219i solu\u021biilor actuale de progamare prin limbaje hardware (programare \u00een limbaj VHDL sau VeriLog utiliz\u00e2nd Xilinx Vivado \/ ISE)<\/a>;<\/p>\n<p>5. Abordarea \u0219i solu\u021bionarea problemelor de inginerie pe baza sistemelor de calcul cu FPGA:<br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2021\/PDF\/Implementarea_unui_nucleu_de_microcontroller.pdf\">Implementarea aplica\u021biilor pe baza nucleului virtual Microblaze \u00een mediul Xilinx Vivado 2016.2;<\/a><\/p>\n<p>6. Implementarea aplica\u021biilor pe baza platformelor cu FPGA:<br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2021\/PDF\/Implementarea_unui_numarator_binar_SG.pdf\">Implementarea unui num\u0103r\u0103tor binar \u00een mediul Matlab &#8211; Simulink cu ajutorul generatorului automat de cod System Generator;<\/a><br \/>\n&#8211; <a href=\"https:\/\/epe.utcluj.ro\/DSP_FPGA_2021\/PDF\/Implementarea_unui_numarator_binar_HDL_C.pdf\">Implementarea unui num\u0103r\u0103tor binar \u00een mediul Matlab &#8211; Simulink cu ajutorul generatorului automat de cod HDL Coder;<\/a><\/p>\n<\/div>\n\t\t<\/div><\/div><\/div><div id=\"pg-gb1628-69f4a7b880d06-3\"  class=\"panel-grid panel-no-style\" ><div id=\"pgc-gb1628-69f4a7b880d06-3-0\"  class=\"panel-grid-cell\" ><div id=\"panel-gb1628-69f4a7b880d06-3-0-0\" class=\"so-panel widget widget_text panel-first-child panel-last-child\" data-index=\"7\" ><h3 class=\"widget-title\">Persoane de contact<\/h3>\t\t\t<div class=\"textwidget\"><p>Titular disciplin\u0103: prof. dr. ing. Teodor Cri\u0219an Pan\u0103<br \/>\nAdres\u0103 de e-mail: Teodor.Pana@emd.utcluj.ro<\/p>\n<p>Responsabil pentru \u0219edin\u021bele de laborator: drd. ing. Pintilie Lucian &#8211; Nicolae<br \/>\nAdres\u0103 de e-mail: Lucian.Pintilie@emd.utcluj.ro<\/p>\n<\/div>\n\t\t<\/div><\/div><\/div><\/div>\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Altair (Solid Thinking Embed) student edition Learn Altair \/ Solid Thinking Embed \/ VisSim Altair Embed \/ Solid Thinking \/ VisSim tutorials LaunchPad F28069M datasheet Code Composer Studio Tutorial Teorema lui Nyquist \u2013 Shannon &nbsp;<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"home-panels.php","meta":{"footnotes":""},"class_list":["post-1628","page","type-page","status-publish","hentry","post"],"_links":{"self":[{"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/pages\/1628","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/comments?post=1628"}],"version-history":[{"count":54,"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/pages\/1628\/revisions"}],"predecessor-version":[{"id":2822,"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/pages\/1628\/revisions\/2822"}],"wp:attachment":[{"href":"https:\/\/epe.utcluj.ro\/index.php\/wp-json\/wp\/v2\/media?parent=1628"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}